1. Field of the Invention
This invention relates to integrated circuit devices and more particularly to deep trench capacitors and methods of manufacture thereof.
2. Description of Related Art
In trench capacitors, dislocations have been found to occur that have been closely associated with stress from polysilicon reorientation/recrystallization. Dislocations are of utmost concern in DRAM and eDRAM products using trench capacitors, since dislocations which occur in the vicinity of the strap outdiffusion are responsible for increased junction leakage and degraded retention time. During standard thermal processing, when the polysilicon in the trench recrystallizes and grain growth occurs, it shrinks (because the loss of grain boundaries from growth reduces the volume). As a result of such shrinkage, the polysilicon experiences significant tensile stresses. This in turn passes significant stresses from the polysilicon into the neighboring structure surrounding the trench, so much so that dislocations are punched out into the silicon active area which then can cause degraded data retention and other problems.
Although the use of pure germanium (Ge) or Silicon Germanium (Si/Ge) doped polysilicon has been proposed as a fill material for trench capacitors, the prior art teaches the use of germanium or germanium doped polysilicon filling the entire trench, which is not employed in this invention. See commonly assigned U.S. Pat. No. 6,180,480 of Economikos et al. for xe2x80x9cGermanium or Silicon-Germanium Deep Trench Fill by Melt-Flow Processxe2x80x9d.
Loh et al. U.S. Pat. No. 5,998,253 for xe2x80x9cMethod for Forming a Dopant Outdiffusion Control Structure Including Selectively Grown Silicon Nitride in a Trench Capacitor of a DRAM Cellxe2x80x9d forms a buried strap for coupling a trench capacitor to a doped junction of a transistor. The strap is composed of intrinsic (undoped) or lightly doped polysilicon, which is again different from the teachings of the present invention.
An advantage of this invention is that it reduces dislocation formation with very little process overhead.
The method and structure of this invention are adapted to being readily integrated into all the various Deep Trench (DT) applications for both planar and vertical DRAM/eDRAM applications.
Heretofore, in the absence of this invention it would have been required that germanium dopant should be introduced in situ because the very high dose required ( greater than 1E17 atoms/cm2) is impractical to achieve using implantation.
In accordance with the method of this invention, a trench capacitor is formed having a top surface, a deep trench in a doped semiconductor substrate. The trench has a bottom, sidewalls and a top extending through the top surface of the substrate. A collar for isolation is formed on trench sidewalls substantially above the bottom. An outer plate of the trench capacitor is formed in the substrate at the bottom of the trench below the collar. A dielectric layer of the trench capacitor is formed on trench sidewalls below the collar. An inner node electrode of the trench capacitor is formed in the trench recessed below the top of the trench. The inner node electrode has an inner node electrode top surface. The method includes the processing steps of etching back the collar below the trench top surface, etching the capacitor inner node electrode below the top of the collar, and codepositing polysilicon and a counter-recrystallizing species over the collar and the inner node electrode top surface to form the cap and the strap.
Preferably, the trench capacitor is formed in a semiconductor substrate having a top surface. A trench formed in a doped semiconductor substrate has a bottom, sidewalls and a top extending through the top surface of the substrate. A collar for isolation is formed on the sidewalls of the trench substantially above the bottom thereof. An outer plate of the trench capacitor is formed in the substrate alongside the trench below the collar. A dielectric layer of the trench capacitor is formed on the walls of the trench below the collar. An inner node electrode of the trench capacitor is formed in the trench recessed below the top of the trench, the inner node electrode having an inner node electrode top surface. There is a recessed collar below the trench top surface. There is a recessed inner node electrode surface below the top of the collar.
Preferably, there is a codeposit of polysilicon and a counter-recrystallizing species in the inner node electrode and the strap.
Preferably, the capacitor includes a combination of polysilicon and germanium as a counter-recrystallizing species formed in at least one of the group consisting of the inner node electrode and the buried strap.
Preferably, the counter-recrystallizing species formed in the inner node electrode and the buried strap are formed with a dose more than about 1E15 atoms/cm2.